1. Field of the Invention
This invention relates to a demodulation circuit including error correction for satellite communication, and more particularly to a demodulation circuit which performs error correction for a channel having a low carrier power to noise power ratio in mobile radio communication.
2. Description of the Related Art
For a demodulation circuit including error correction for a received signal in satellite communication, various demodulation algorithms have been investigated to improve the characteristic in error correction because the received radio wave is very weak. Demodulation circuits including error correction which are based on the demodulation algorithms have been developed. Among them, a demodulation circuit including error correction based on convolutional coding and Viterbi decoding is popularly used. The demodulation circuit has a strong error correction function as a demodulation circuit including error correction and improves the bit error ratio of a received signal significantly.
FIG. 1 is a view showing a construction of a conventional modulation-demodulation circuit including error correction based on convolutional coding and Viterbi decoding. Referring to FIG. 1, modulation circuit 100 includes convolutional coder 101, interleaver 102, reference bit inserter 103, and modulator (for example, a BPSK modulator) 104. Demodulation circuit 200 includes demodulator (for example, a BPSK demodulator) 201, reference bit remover 202, deinterleaver 203, and Viterbi decoder 204.
Now, operation of modulation circuit 100 is described. Convolutional coder 101 convolutionally codes an input burst data signal. Interleaver 102 interleaves the convolutionally coded data in accordance with specifications. Reference bit inserter 103 delimits the interleaved data at predetermined intervals and inserts reference bits in order to assure a high degree of accuracy in demodulation of a received signal. The reference bits are used as reference information to the phase and the amplitude. Modulator 104, for example, BPSK converts an output of reference bit inserter 103 and outputs a resulting signal as a transmission signal.
Next, operation of demodulation circuit 200 is described. Demodulator 201 demodulates a received burst data signal using the reference bits by, for example, BPSK demodulation. Reference bit remover 202 removes the reference bits from the demodulated burst data. Deinterleaver 203 performs deinterleaving by which the data are re-arranged (deinterleaved) in accordance with specifications corresponding to those of the interleaving of the modulator, and outputs the deinterleaved data to Viterbi decoder 204. Viterbi decoder 204 performs decoding corresponding to the coding by the convolutional coder and outputs maximum likely data as Viterbi decoded data.
In the conventional modulation-demodulation circuit including error correction, the demodulation circuit therein supplies, in error correction, information of the maximum likelihood from the demodulator to the error correction unit with not only the demodulator but also characteristics of error correction taken into consideration. In short, the demodulation unit and the error correction unit individually perform optimization separately from each other.
However, for conventional modulation-demodulation circuits including error correction based on convolutional coding and Viterbi decoding, various demodulation algorithms have been investigated and developed to improve the characteristics in error correction. For the demodulation circuit for the modulation-demodulation circuits, efforts are directed to improve the performance with not only the demodulator but also the characteristics in error correction take into consideration. Upon maximum likelihood decoding by which a Viterbi algorithm is used to decode maximum likely data from a convolutional signal in error correction, information of the likelihood is transmitted from the demodulator to the Viterbi decoder including error correction.